Nambari ya Sehemu :
SI5382E-E-GMR
Mzalishaji :
Silicon Labs
Maelezo :
UNPROGRAMMED PROTOTYPING DEVICEL
Chapa :
Clock Jitter Attenuator
Uingizaji :
LVCMOS, Crystal
Pato :
HCSL, LVCMOS, LVDS, LVPECL
Kiwango - Pembejeo: Pato :
4:12
Tofauti - pembejeo: Pato :
Yes/Yes
Mara kwa mara - Max :
735MHz, 2.94912GHz
Mgawanyaji / Kuzidisha :
Yes/No
Voltage - Ugavi :
1.71V ~ 3.47V
Joto la Kufanya kazi :
-40°C ~ 85°C
Aina ya Kuinua :
Surface Mount
Kifurushi / Kesi :
64-VFQFN Exposed Pad
Kifurushi cha Kifaa cha Mtoaji :
64-QFN-EP (9x9)